A processor, a controller or even a simple arithmetic circuit begins with a very simple idea that eventually takes the form of hardware.
But how does a piece of code become a physical chip?
This talk explores that journey through the lens of open-source semiconductor development. Using a simple Arithmetic Logic Unit (ALU) as an example, we will look at how digital hardware is described in Verilog, tested through simulation and transformed into a gate-level representation before entering the physical design stage.
The session follows a practical toolchain involving Icarus Verilog for simulation, Yosys for synthesis and OpenLane for ASIC implementation.
Rather than treating these as isolated software packages, the we connect them into a broader picture of how open-source tools support different stages of chip development.
It will also explore the communities and projects making this ecosystem possible, from open-source Process Design Kits [PDKs]…such as SkyWater and GF180MCU to OpenROAD and Tiny Tapeout, which provide opportunities to learn, experiment and engage with real silicon design workflows.
basically ,the aim is to move beyond the idea that semiconductor development is accessible only within large companies or specialised laboratories, and introduce a pathway through which students, independent devs can begin exploring the world of silicon.