"Domain-customized architecture exploration via HW/SW Co-Design with RISC-V!" Lessons learnt from cutting-edge research!

Session Description

A breather into Computer Architecture research and where open-source tools plays a role. A glance at RISC-V and it's place when running simulations for various other proprietery ISAs. Breaking down Mempool, a RISCV-based cluster designed by PULP and which was used by my research team that bagged the best lightning talk at the high performance computing conference, goa, 2023. (it's an open source framework). Experience with research and relevant frameworks used including shedding light on HyprThrd (computer architecture community) and will also finally talk about where we academicians stand and moving forward how things will pan out in the RISC-V space in india including research.

Hello there! My name's Aakarsh Vinay and I'm currently pursuing my undergraduate degree in the field of Electronics & Communication at PES University, Bangalore, India. Advanced Computer Architecture, Heterogeneous Architectures and HW/SW Co-Design within the VLSI spectrum are the few core compact pieces to my jigsaw encompassing the passions I possess. Currently a research intern at the Centre for Heterogeneous and Intelligent Processing Systems (C.H.I.P.S) and soon going to be a Research Assistant at IISC, most of my research shuttles between hardware-software co-design on open source architectures for specific workloads while coming up with custom novel architectures within the RISCV ISA! I'm the co-founder of a computer architecture interest group that spans over 350+ members and hosts weekly paper discussions on papers across reputed conferences like ISCA, HPCA, ASPLOS, MICRO called HyprThrd! We're live on Twitter and Discord and we're getting bigger.

"Domain-customized architecture exploration via HW/SW Co-Design with RISC-V!" Lessons learnt from cutting-edge research!

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Aakarsh Vinay

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